Anritsu & Synopsys To Jointly Demonstrate World’s First PCI Express 5.0 Rx LEQ Test System

Posted by Anritsu Corporation

Anritsu Corporation and Synopsys are jointly demonstrating the world’s first PCI Express® (PCIe® ) 5.0 Rx LEQ Test System supporting compliance test items using Anritsu’s Signal Quality Analyzer-R MP1900A series PCI Express 5.0 test system and Synopsys’ DesignWare IP for PCIe at DesignCon 2020 in Santa Clara, January 28-30. The live demonstrations will be conducted in the Anritsu DesignCon booth, #837.

With high-speed data rates of 32 GT/s, PCIe 5.0 requires new measurements, such as complex link training and crosstalk tests. With high-quality signals supporting 32G, the MP1900A PCIe solution improves the efficiency of link training tests by monitoring/logging Link Training and Status State Machine (LTSSM) transitions and generating event triggers for waveform capture. Multichannel expandability for crosstalk tests and easy expandability from PCIe 4.0 (16 GT/s data rates) to PCIe 5.0 (32 GT/s data rates) support early implementation of PCIe 5.0 products.

The joint DesignCon 2020 exhibit will demonstrate stress signal generation using the MP1900A BERT and a PCIe 5.0 compliance board. It will also conduct actual link training of a system incorporating the Synopsys DesignWare IP for PCIe 5.0 and Anritsu MP1900A PCIe 5.0 Link Training Software to evaluate receiver stressed input characteristics.

About the Signal Quality Analyzer-R MP1900A

Anritsu’s Signal Quality Analyzer-R MP1900A series is a high-performance bit error rate tester (BERT) for testing computer high-speed bus interfaces, such as PCI Express 5.0, USB3.2/4.0, and 53.125-Gbaud PAM4 400/800 GbE-compliant communications equipment. It is also for measuring next-generation, high-speed communications interfaces, such as PCI Express 6.0, used by PAM4.―CT Bureau