Govt to white-list VCs under ISM 2.0 to boost semiconductor design

India’s semiconductor design ambitions will only be realised if the ecosystem learns to embrace risk rather than avoid it, according to MeitY Secretary S Krishnan. In an exclusive interview to Business Standard, he underlined that betting on early‑stage chip design ventures, new architectures and untested IP is essential for India to move beyond services into core semiconductor innovation and product ownership.

As part of this shift, the government is preparing to “white‑list” select venture capital firms under ISM 2.0 to co‑invest in semiconductor design startups. The idea is to channel patient, specialised capital into chip design while de‑risking funding for young companies through a curated pool of investors aligned with the programme’s long‑term goals. This approach is expected to improve deal quality, accelerate fundraising and reduce the probability of purely speculative capital crowding the space.

Under ISM 2.0, the focus is on building a deeper, more resilient chip ecosystem that spans fabless design, IP development, verification, and eventual manufacturing partnerships. By sharing risk through co‑investment and structured support, government and VC partners aim to help Indian startups scale from prototype to commercially viable designs in areas such as automotive, telecom, industrial automation and strategic electronics.

For India, success in semiconductor design is critical not just for reducing import dependence, but for securing a stronger position in global technology supply chains. Encouraging risk‑taking, backed by smart capital and targeted policy support, is seen as the only way to move from incremental progress to genuine breakthroughs in chip design and to nurture home‑grown champions capable of competing internationally.
CT Bureau