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Intel takes next step toward building scalable silicon-based quantum processors

Nature published an Intel research paper, “Probing single electrons across 300-mm spin qubit wafers,” demonstrating state-of-the-art uniformity, fidelity and measurement statistics of spin qubits. The industry-leading research opens the door for the mass production and continued scaling of silicon-based quantum processors, all of which are requirements for building a fault-tolerant quantum computer.

Quantum hardware researchers from Intel developed a 300-millimeter cryogenic probing process to collect high-volume data on the performance of spin qubit devices across whole wafers using complementary metal oxide semiconductor (CMOS) manufacturing techniques.

The improvements to qubit device yield combined with the high-throughput testing process enabled researchers to obtain significantly more data to analyze uniformity, an important step needed to scale up quantum computers. Researchers also found that single-electron devices from these wafers perform well when operated as spin qubits, achieving 99.9% gate fidelity. This fidelity is the highest reported for qubits made with all-CMOS-industry manufacturing.

The small size of spin qubits, measuring about 100 nanometers across, makes them denser than other qubit types (e.g., superconducting), enabling more complex quantum computers to be made on a single chip of the same size. The fabrication approach was conducted using extreme ultraviolet (EUV) lithography, which allowed Intel to achieve these tight dimensions while also manufacturing in high volume.

Realizing fault-tolerant quantum computers with millions of uniform qubits will require highly reliable fabrication processes. Drawing upon its legacy in transistor manufacturing expertise, Intel is at the forefront of creating silicon spin qubits similar to transistors by leveraging its cutting-edge 300-millimeter CMOS manufacturing techniques, which routinely produce billions of transistors per chip.

Building on these findings, Intel plans to continue to make advances in using these techniques to add more interconnect layers to fabricate 2D arrays with increased qubit count and connectivity, as well as demonstrating high-fidelity two-qubit gates on its industry manufacturing process. However, the main priority will continue to be scaling quantum devices and improving performance with its next generation quantum chip.

CT Bureau

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