With more than 20% of the world’s semiconductor designers working out of India, chip designing is a good starting point for the ecosystem the government is planning to set up in India, apart from assembly, testing, marking and packaging (ATMP), a top official of an industry body said.
Vivek Tyagi, chairperson of India Electronics and Semiconductor Association (IESA) said that his endeavour is to push for semiconductor design. “More and more that we design, more intellectual properties we have, more patents we have, and more high value jobs we can create, rather than just assembly worker jobs.”
IESA is an industry body representing semiconductors and electronics systems design and manufacturing industry in India.
The design-led manufacturing incentive (DLI) scheme under the production-linked incentive scheme (PLI) for semiconductors rolled out by the government in December 2021, is an important step. The DLI scheme is more for Indian semiconductor startups that the government hopes to create, Tyagi said.
“It’s not as capital intensive as manufacturing, but the tools you require also run into millions of dollars. The gestation period for semiconductor design and manufacturing is long, so if there is a startup with good ideas, 100 engineers, high expense, it needs to be handled 4-5 years before a revenue-generating product can come out. The DLI scheme will aid in that,” Tyagi said.
The government’s DLI scheme offers financial incentives, design infrastructure support across various stages of development and deployment of chip design. The scheme promises product design linked incentives of up to 50% of the eligible expenditure, subject to a ceiling of Rs 15 crore per application, and deployment linked incentive of 4-6% of net sales turnover for over five years with a Rs 30 crore ceiling per application.
Tyagi said India’s lack of adequate number of patents and IPs is not a big bottleneck for chip design. “We can always find some way of implementing or achieving something already patented. But for that, we require major PhD programs in major universities,” he added.
Most global semiconductor companies have chip designers based out of India, Tyagi said, stating the number of chip designers in India to be around 120,000. “If not the full chip, they are engaged in the major projects as part of the global teams. India is already playing a major role in the chip design part.”
However, there is a severe talent crunch in the semiconductor industry with IESA’s member companies having hundreds of open positions in India. But with over 4,000 engineering colleges and 15 lakh engineering students passing out every year, according to an education ministry report in 2021, India has a good scope in filling the gap.
Tyagi said IESA is already working with the Karnataka government and Indian Institute of Information Technology to create a one-year PG-Diploma course in chip designing for engineering graduates. Tyagi said MeiTy is also looking at semiconductor-specific courses, with a number of initiatives being discussed.
India’s opportunities also lie in setting up assembly, testing and packaging facilities for semiconductors, which Tyagi said is a low hanging fruit.
“Right now, there are no test facilities for chips in India. When chip designers build a chip out of India, it goes to the headquarters or somewhere else, and testing takes months,” Tyagi said. “If they find an issue in testing, the designers have to fly to the test facilities to fix the bugs. So the cycle is like 3-6 months. If these companies move the test facilities here, it anyway adds value to everybody in the semiconductor industry,” he added.
With the Rs 76000 crore PLI scheme for semiconductors, the government plans to provide incentives of up to 30-50% of the project cost in setting up semi and display fabs, and providing fiscal support of 30% of capex for setting up ATMP and OSAT facilities in India.
More than 20 companies have applied for the scheme, including a joint venture by Vedanta and Foxconn. Tyagi said the government will need six to nine months to finalise the applicants of the scheme.
However, once finalised, chip makers in India will have to grapple with a few fundamental challenges while setting up fabs. Semiconductor fabs require a high volume of pure water, consistent supply of electricity and a dust-free environment, among other things like high capital expenditure and skilled labour.
“These are challenges, but not ones which cannot be overcome. We have a number of states in the coastal parts, so water access is not the issue. In fact, the Karnataka government is saying they will offer a place to semiconductor fabs in Mysore, which has the Cauvery river flowing through. There is a massive dam there, and no water shortage. The dam also has an electricity generation station,” Tyagi said.Pehal News